Subject: Emerging TechXIT

Why in the News

The Centre has notified the operational framework for its Rs 1.27 lakh crore Semicon 2.0 programme, placing the design of Indian chips and the intellectual property behind them at the front of the country’s semiconductor strategy.

Components of the Semicon 2.0 programme

1. Support runs across six pillars: At least three of them are devoted entirely to chip design.
2. Three design incentives are on offer: Chips designed for strategic purposes, chips for the commercial market, and domestically developed chips deployed at scale each attract separate support.
3. The upstream chain has its own track: Makers of semiconductor materials, chemicals and manufacturing equipment are eligible outside the design pillars.
4. Fabrication and packaging remain funded: Fabrication plants and advanced chip packaging continue to draw subsidy alongside the design tracks.

How will the strategic chip design track work?

1. The government picks the technologies first: It will identify technologies and building blocks, including intellectual property for compute, memory, radio frequency, power, networking and sensors, that it wants developed in India.
2. The trigger is national importance: The track covers chips meant for areas of national importance and for critical infrastructure.
3. Selection runs through competitive bidding: The Centre for Development of Advanced Computing (C-DAC), the government’s high performance computing research organisation under the Ministry of Electronics and Information Technology, will issue requests for proposals and select developers.
4. The state keeps a share of the intellectual property: The intellectual property created under these projects will be jointly owned by the developing company and C-DAC.
5. Consortiums are permitted: Indian owned and controlled companies can participate independently or alongside global companies, research organisations and academic institutions.

What does the commercial design track offer?

1. The target is a fabless industry: The track aims to build commercially viable Indian fabless chip companies, meaning firms that design chips and contract out their manufacture.
2. Firms get access to design infrastructure: Eligible firms receive electronic design automation (EDA) tools, multi-project wafer fabrication, intellectual property cores, compute sub-systems and post-silicon validation.
3. Small firms receive seed money: Start-ups and micro, small and medium enterprises (MSMEs) designing commercial chips can receive up to Rs 15 crore or 50 per cent of project cost, whichever is lower.
4. The government can take equity: It can make equity co-investments alongside venture capital or private equity investors.
5. Large firms repay through royalty: Larger companies can opt for royalty financing and pay 5 per cent of a product’s net revenue until 1.5 times the government’s financial support has been recovered.
6. Eligibility now reaches Overseas Citizens of India: Companies incorporated and headquartered in India qualify if they are owned and controlled by Indian citizens or Overseas Citizens of India (OCIs) and maintain a significant operational and manpower presence in the country.

What does the framework do for the upstream supply chain?

1. Capital support is set at 30 per cent: Research and development facilities for semiconductor equipment, plants making semiconductor grade wafers, photomasks, photoresists, substrates, chemicals and gases, testing facilities, and units producing equipment and components can each claim that share of capital expenditure.
2. Equipment makers get a declining incentive: A production linked incentive of 10, 8, 6, 4 and 2 per cent runs over five years beginning FY 2028-29.
3. The incentive is tied to domestic sourcing: It is paid on the value of the bill of materials that an equipment maker sources from domestic manufacturers.
4. Total support carries a ceiling: Combined support for these units is capped at 50 per cent of eligible capital expenditure.
5. The chain being targeted is largely imported today: The upstream inputs needed to operate semiconductor factories are currently brought in from abroad.

Challenges to India’s semiconductor design push

1. A design still has to be turned into silicon: A fabless firm depends on a foundry, and the wafers for an Indian design are fabricated abroad until domestic plants reach production. Eg. Indian design centres of global chip firms already complete chip designs that are fabricated in Taiwan and South Korea.
   The Fix: Tie the later tranches of design support to committed capacity bookings at Indian fabrication plants, so domestic demand and domestic supply arrive together.
2. The talent sits inside multinational captive centres: India supplies a large share of the world’s chip design engineers, and most of them work on parts of products owned elsewhere. Eg. Global semiconductor companies run large design centres in Bengaluru, Hyderabad and Noida.
   The Fix: Subsidise multi-project wafer runs for university teams so student designs reach silicon and full product ownership is learned before graduation.
3. The design tools are a concentrated import: Electronic design automation software comes from a small number of United States based vendors and is subject to export control. Eg. The United States restricted sales of that software to Chinese customers in 2025 before reversing the order weeks later.
   The Fix: Secure long term licence access inside technology partnership agreements and fund an indigenous tool stack for mature process nodes.
4. Approved outlay is not disbursed money: A start-up carries the working capital cost of a delayed claim, and slow disbursal has followed earlier electronics incentive schemes. Eg. Disbursals under production linked incentive schemes have repeatedly trailed the amounts approved across sectors.
   The Fix: Set a claim settlement deadline in the scheme guidelines with interest payable on delayed disbursal.
5. Utilities decide where a plant can go: A fabrication plant requires ultrapure water and uninterrupted power at a scale few industrial locations can guarantee. Eg. Taiwan’s 2021 drought forced its foundries to truck in water and to cut consumption.
   The Fix: Pre-certify candidate sites for water and power reliability before approving a plant at that location.

Conclusion

Semicon 2.0 can transform India into a global semiconductor powerhouse by nurturing indigenous chip design, strengthening manufacturing, reducing import dependence, creating high-value jobs, and boosting technological self-reliance.

Back2Basics: Centre for Development of Advanced Computing

1. Establishment: Set up in 1988 as a scientific society under what is now the Ministry of Electronics and Information Technology.
2. Origin: It was created to build indigenous supercomputers after India was refused access to imported high performance computing systems.
3. Flagship line: It developed the PARAM series of supercomputers, beginning with PARAM 8000 in 1991.
4. Present mandate: It works on high performance computing, microprocessors, language computing and cyber security, and implements the National Supercomputing Mission alongside the Indian Institute of Science.

“[2025, GS3, 15 marks] India aims to become a semiconductor manufacturing hub. What are the challenges faced by the semiconductor industry in India? Mention the salient features of the India Semiconductor Mission.”